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NCV7321 Stand Alone LIN Transceiver
Description
The NCV7321 is a fully featured local interconnect network (LIN) transceiver designed to interface between a LIN protocol controller and the physical bus. The transceiver is implemented in I3T technology enabling both high-voltage analog circuitry and digital functionality to co-exist on the same chip. The NCV7321 LIN device is a member of the in-vehicle networking (IVN) transceiver family. It is designed to work in harsh automotive environment and is qualified following the TS16949 flow. The LIN bus is designed to communicate low rate data from control devices such as door locks, mirrors, car seats, and sunroofs at the lowest possible cost. The bus is designed to eliminate as much wiring as possible and is implemented using a single wire in each node. Each node has a slave MCU-state machine that recognizes and translates the instructions specific to that function. The main attraction of the LIN bus is that all the functions are not time critical and usually relate to passenger comfort.
Features
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8 1
SOIC-8 CASE 751
PIN ASSIGNMENT
RxD EN WAKE TxD
1
8 7 6 5
INH VBB LIN GNI
NCV7321
2 3 4
* General *
*
* *
SOIC-8 Green package (Pb-Free) (Top View) PC20040918.3 LIN-Bus Transceiver LIN Compliant to Specification Revision 2.0 and 2.1 (Backwards ORDERING INFORMATION Compatible to Version 1.3) and J2602 See detailed ordering and shipping information in the package Bus Voltage $45 V dimensions section on page 11 of this data sheet. Transmission Rate 1 kbps to 20 kbps Sleep Mode: LIN Transceiver Disabled, the Protection Consumption from VBB is Minimized, INH Switch Thermal Shutdown is Off Indefinite Short-Circuit Protection on Pins LIN and Standby Mode: transition mode reached either after WAKE Towards Supply and Ground power-up or after a wakeup event, INH switch is on Load Dump Protection (45 V) Wake-up Bringing the Component from Sleep Bus Pins Protected Against Transients in an Mode into Standby Mode is Possible either by LIN Automotive Environment Command or a Digital Signal on WAKE Pin (e.g. EMI Compatibility External Switch) Integrated Slope Control * These are Pb-Free Devices Modes
Normal Mode: LIN Transceiver Enabled, Communication via the LIN Bus is Possible, INH Switch is On
(c) Semiconductor Components Industries, LLC, 2010
June, 2010 - Rev. 8
1
Publication Order Number: NCV7321/D
NCV7321
KEY TECHNICAL CHARACTERISTICS AND OPERATING RANGES
Table 1. KEY TECHNICAL CHARACTERISTICS AND OPERATING RANGES
Symbol VBB IBB_SLP VLIN VWAKE VINH V_Dig_IO TJ Tamb VESD Parameter Nominal Battery Operating Voltage (Note 1) Load Dump Protection Supply Current in Sleep Mode LIN Bus Voltage Operating DC Voltage on WAKE Pin Maximum Rating Voltage on WAKE Pin Operating DC Voltage on INH Pin Operating DC Voltage on Digital IO Pins (EN, RxD, TxD) Junction Thermal Shutdown Temperature Operating Ambient Temperature Electrostatic Discharge Voltage (all pins) Human Body Model (Note 2) Version NCV7321D11; no filter on LIN Electrostatic Discharge Voltage (LIN) System Human Body Model (Note 3) -40 -4 -13 -45 0 -35 0 0 165 +125 +4 +13 Min 5 Typ 12 Max 27 45 20 45 VBB 45 VBB 5.5 mA V V V V V C C kV kV Unit V
1. Below 5 V on VBB in normal mode, the bus will either stay recessive or comply with the voltage level specifications and transition time specifications as required by SAE J2602. It is ensured by the battery monitoring circuit. 2. Equivalent to discharging a 100 pF capacitor through a 1.5 kW resistor conform to MIL STD 883 method 3015.7. 3. Equivalent to discharging a 150 pF capacitor through a 330 W resistor. System HBM levels are verified by an external test-house.
BLOCK DIAGRAM
INH VBB
POR VBB State & Wake-up Control
WAKE EN
Thermal shutdown
Osc COMP RxD
+ - Filter LIN
TxD
time-out
Slope Control
NCV7321 PD20070503.2 GND
Figure 1. Block Diagram
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NCV7321
TYPICAL APPLICATION
bat VBAT 3.3/5V VCC Microcontroller GND ECU
VBB NCV7321 INH 8 LIN WAKE GND LIN 6 WAKE 3 7
1 RxD 4 TxD 2 EN
5
GND
PD20070503.1 KL30 LIN- BUS KL31
Figure 2. Typical Application Diagram for a Master Node Table 2. PIN DESCRIPTION
Pin 1 2 3 4 5 6 7 8 Name RxD EN WAKE TxD GND LIN VBB INH Description Receive Data Output; Low in Dominant State; Open-Drain Output Enable Input, Transceiver in Normal Operation Mode when High, Pulldown Resistor to GND High Voltage Digital Input Pin to Apply Local Wakeup, Sensitive to Falling Edge, Pullup Current Source to VBB Transmit Data Input, Low for Dominant State, Pulldown to GND (Switchable Strength for Wakeup Source Recognition) Ground LIN Bus Output/Input Battery Supply Input Inhibit Output, Switch Between INH and VBB can be Used to Control External Regulator or Pullup Resistor on LIN Bus
Table 3. ABSOLUTE MAXIMUM RATINGS
Symbol VBB VLIN VWAKE VINH V_Dig_IO TJ VESD Voltage on Pin VBB LIN Bus Voltage DC Voltage on WAKE Pin DC Voltage on INH Pin DC Input Voltage on Pins (EN, RxD, TxD Maximum Junction Temperature HBM (All Pins) (Note 4) CDM (All Pins) (Note 5) Version NCV7321D10: HBM (LIN, INH, VBB, WAKE) (Note 6) System HBM (LIN, VBB, WAKE) (Note 7) Version NCV7321D11: HBM (LIN, INH, VBB, WAKE) (Note 6) System HBM (VBB, WAKE) (Note 8) System HBM (LIN) (Note 8) Parameter Min -0.3 -45 -35 -0.3 -0.3 -40 -4 -750 -5 -5 -8 -7 -13 Typ Max +45 +45 +45 VBB + 0.3 +45 +150 +4 +750 +5 +5 +8 +7 +13 Unit V V V V V C kV V kV kV kV kV kV
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 4. Equivalent to discharging a 100 pF capacitor through a 1.5 kW resistor conform to MIL STD 883 method 3015.7. 5. Charged device model test according to ESD STM5.3.1-1999. 6. Equivalent to discharging a 100 pF capacitor through a 1.5 kW resistor referenced to GND. 7. Equivalent to discharging a 150 pF capacitor through a 330 W resistor. 220 nF filter on LIN pin. System HBM levels are verified by an external test-house. 8. Equivalent to discharging a 150 pF capacitor through a 330 W resistor. No filter on LIN pin. System HBM levels are verified by an external test-house.
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NCV7321
FUNCTIONAL DESCRIPTION
Overall Functional Description
LIN is a serial communication protocol that efficiently supports the control of mechatronic nodes in distributed automotive applications. The domain is class-A multiplex buses with a single master node and a set of slave nodes. The NCV7321 contains the LIN transmitter, LIN receiver, power-on-reset (POR) circuits and thermal shutdown (TSD). The LIN transmitter is optimized for the maximum specified transmission speed of 20 kB with EMC performance due to reduced slew rate of the LIN output.
The junction temperature is monitored via a thermal shutdown circuit that switches the LIN transmitter off when temperature exceeds the TSD trigger level. The NCV7321 has four operating states (unpowered mode, standby mode, normal mode and sleep mode) that are determined by the supply voltage VBB, input signals EN and WAKE and activity on the LIN bus.
OPERATING STATES
Standby mode - LIN Transceiver: OFF - LIN Term: 30 kW - INH Pin = High - RxD: Low After a Wake-up/ Floating Otherwise - TxD: Wake-up Source Flag EN = High for t > T_enable
Normal mode - LIN Transceiver: ON - LIN Term: 30 kW - INH Pin: High - RxD: Received LIN Data - TxD: Weak Pulldown Transmitter Input
LIN Wake-Up or Local Wake-Up
VBB Above Reset Level
EN = Low for t > T_disable
EN = High for t > T_enable
Unpowered (VBB Below Reset Level) - LIN Transceiver: OFF - LIN Term: Floating - INH Pin: Floating - RxD: Floating - TxD: Weak Pulldown
Sleep Mode - LIN Transceiver: OFF - LIN Term: Current Source - INH Pin: Floating - RxD: Floating - TxD: Weak Pulldown
PD20080606.2
Figure 3. State Diagram Unpowered Mode
As long as VBB remains below its power-on-reset level, the chip is kept in a safe unpowered state. LIN transmitter is inactive, both LIN and INH pins are left floating and only a weak pulldown is connected on pin TxD. Pin RxD remains floating. The unpowered state will be entered from any other state when VBB falls below its power-on-reset level.
Standby Mode
Standby mode is a low-power mode, where LIN transceiver remains inactive while INH pin is driven high to activate an external voltage regulator - see Figure 2. Depending on the transition which led to the standby mode, pins RxD and TxD are configured differently during this mode. A 30 kW resistor in series with a reverse-protection diode is internally connected between LIN and VBB Pins. Standby mode is entered in one of the following ways: * After the voltage level at VBB pin rises above its power-on-reset level. In this case, RxD Pin remains
high-impedant and the pulldown applied on pin TxD remains weak. * After a wakeup event is recognized while the chip was in the sleep mode. Pin RxD is pulled low while pin TxD signals the type of wakeup leading to the standby mode - its pullup remains weak for LIN wakeup and it is switched to strong pulldown for the case of local wakeup (i.e. wakeup via Pin WAKE). While in the standby mode, the configuration of Pins RxD and TxD remains unchanged, regardless the activity on WAKE and LIN Pins - i.e. if additional wakeups occur during the standby mode, they have no influence on the chip configuration.
Normal Mode
In normal mode, the full functionality of the LIN transceiver is available. Data according the state of TxD input are sent to the LIN bus while pin RxD reflects the logical symbol received on the LIN bus - high-impedant for recessive and Low for dominant. A 30 kW resistor in series
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NCV7321
with a reverse-protection diode is internally connected between LIN and VBB pins. To avoid that, due to a failure of the application (e.g. software error), the LIN bus is permanently driven dominant and thus blocking all subsequent communication, signal on pin TxD passes through a timer, which releases the bus in case TxD remains low for longer than T_TxD_timeout. The transmission can continue once the TxD returns to High logical level. In case the junction temperature increases above the thermal shutdown threshold, e.g. due to a short of the LIN wiring to the battery, the transmitter is disabled and releases LIN bus to recessive. Once the junction temperature decreases back below the thermal shutdown release level, the transmission can be enabled again - however, to avoid thermal oscillations, first a High logical level on TxD must be encountered before the transmitter is enabled. As required by SAE J2602, the transceiver must behave safely below its operating range - it shall either continue to transmit correctly (according its specification) or remain silent (transmit a recessive state regardless of the TxD signal). A battery monitoring circuit in NCV7321 de-activates the transmitter in the normal mode if the VBB level drops below MONL_VBB. Transmission is enabled again when VBB reaches MONH_VBB. The internal logic remains in the normal mode and the reception from the LIN line is still possible even if the battery monitor disables the transmission. Although the specifications of the monitoring and power-on-reset levels are overlapping, it's ensured by the implementation that the monitoring level never falls below the power-on-reset level. Normal mode can be entered from either standby or sleep mode when EN Pin is High for longer than T_enable. When the transition is made from standby mode, TxD pulldown is set to weak and RxD is put high-impedant immediately after EN becomes High (before the expiration of T_enable filtering time). This excludes signal conflicts between the standby mode pin settings and the signals required to control the chip in the normal mode (e.g. strong pull-down on TxD after local wakeup vs. High logical level on TxD required to send a recessive symbol on LIN).
Sleep Mode
Sleep mode provides extremely low current consumption. The LIN transceiver is inactive and the battery consumption is minimized. Pin INH is put to high-impedant state to disable the external regulator and, in case of a master node, the LIN termination - see Figure 2. Only a weak pullup current source is internally connected between LIN and VBB Pins, in order to minimize current consumption even in case of LIN short to GND. Sleep mode can be entered from normal mode by assigning Low logical level to pin EN for longer than T_disable. The sleepmode can be entered even if a permanent short occurs either on LIN or WAKE Pin. If a wakeup event occurs during the transition between normal and sleep mode (during the T_disable filtering time), it will be regarded as valid wakeup and the chip will enter standby mode with the appropriate setting of Pins RxD and TxD.
Wake-up
Two types of wakeup events are recognized by NCV7321: * Local wakeup - when a high-to-low transition on pin WAKE is encountered and WAKE pin remains Low at least during T_WAKE - see Figure 4. * Remote (or LIN) wakeup - when LIN bus is externally driven dominant during longer than T_LIN_wake and a rising edge on LIN occurs afterwards - see Figure 5. Wakeup events can be exclusively detected in sleep mode or during the transition from normal mode to sleep mode. Due to timing tolerances, valid wakeup events beginning shortly before normal-to-sleep mode transition can be also sometimes regarded as valid wakeups.
WAKE
VBB
Local wakeup recognized
T_WAKE V_WAKE_th
Sleep Mode
Stand- Mode by
PD20070503.4
t
Figure 4. Local Wakeup Detection
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NCV7321
LIN
Detection of Remote Wake- Up VBB T_LIN_wake 40% VBB 60% Vbb T_enable LIN dominant level Stand- Mode by LIN recessive level
Sleep Mode
t
PD20070504.2
Figure 5. Remote (LIN) Wakeup Detection
ELECTRICAL CHARACTERISTICS
Definitions
All voltages are referenced to GND (Pin 5). Positive currents flow into the IC.
Table 4. DC CHARACTERISTICS (VBB = 5 V to 27 V; TJ = -40C to +150C; unless otherwise specified. Typical values are given
at V(VBB) = 12 V and TJ = 25C, unless specified otherwise.)
DC CHARACTERISTICS - SUPPLY
Symbol VBB IBB_ON_rec IBB_ON_dom IBB_STB IBB_SLP IBB_SLP_18V IBB_SLP_12V LIN TRANSMITTER VLIN_dom_LoSu p VLIN_dom_HiSup VLIN_REC ILIN_lim Rslave ILIN_off_dom ILIN_off_dom_slp LIN Dominant Output Voltage LIN Dominant Output Voltage LIN Recessive Output Voltage Short Circuit Current Limitation Internal Pullup Resistance LIN output current, bus in dominant state LIN Output Current, Bus in Dominant State Normal Mode, Driver Off; VBB = 12 V Sleep Mode, Driver Off; VBB = 12 V TXD = Low; VBB = 7.3 V TXD = Low; VBB = 18 V TXD = HighH; ILIN = 0 mA VLIN = VBB_max VBB - Vg (Note 9) 40 20 -1 -20 -15 -2 33 200 47 1.2 2.0 V V V mA kW mA mA VBB Consumption VBB Consumption VBB Consumption VBB Consumption VBB Consumption VBB Consumption Normal Mode; LIN recessive VLIN = V(VBB) = VINH = VWAKE Normal Mode; LIN dominant V(VBB) = VINH = VWAKE Standby Mode VLIN = V(VBB) = VINH = VWAKE Sleep Mode VLIN = V(VBB) = VINH = VWAKE Sleep Mode, VBB < 18 V VLIN = V(VBB) = VINH = VWAKE Sleep Mode, VBB = 12 V, TJ < 85C VLIN = V(VBB) = VINH = VWAKE 1.6 8 350 30 20 10 mA mA mA mA mA mA Parameter Conditions Min Typ Max Unit
9. Vg is the forward diode voltage. Typically (over the complete temperature) Vg = 1 V.
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NCV7321
Table 4. DC CHARACTERISTICS (VBB = 5 V to 27 V; TJ = -40C to +150C; unless otherwise specified. Typical values are given
at V(VBB) = 12 V and TJ = 25C, unless specified otherwise.)
DC CHARACTERISTICS - SUPPLY
Symbol LIN TRANSMITTER ILIN_off_rec ILIN_no_GND ILIN_no_VBB LIN RECEIVER Vbus_dom Vbus_rec Vrec_dom Vrec_rec Vrec_cnt Vrec_hys Bus Voltage for Dominant State Bus Voltage for Recessive State Receiver Threshold Receiver Threshold Receiver Centre Voltage Receiver Hysteresis LIN Bus Recessive - Dominant LIN Bus Dominant - Recessive (Vbus_dom + Vbus_rec)/2 (Vbus_rec - Vbus_dom) 0.6 0.4 0.4 0.475 0.05 0.6 0.6 0.525 0.175 0.4 VBB VBB VBB VBB VBB VBB LIN Output Current, Bus in Recessive State Communication not Affected LIN Bus Remains Operational Driver Off; VBB < 18 V; VBB < VLIN < 18 V VBB = GND = 12 V; 0 < VLIN < 18 V VBB = GND = 0 V; 0 < VLIN < 18 V -1 1 1 5 mA mA mA Parameter Conditions Min Typ Max Unit
DC CHARACTERISTICS - I/Os
Symbol PIN EN Vil_EN Vih_EN Rpd_EN PIN INH Delta_VH I_leak PIN RxD Iol_RxD Ioh_RxD PINS TxD Vil_TxD Vih_TxD Rpd_TxD Low Level Input Voltage High Level Input Voltage Pulldown Resistor on TxD Pin, Corresponding to "Weak Pulldown" Normal Mode or Sleep Mode or Standby Mode after Powerup or Standby Mode after LIN Wakeup -0.3 2.0 150 350 0.8 5.5 650 V V kW Low Level Output Current High Level Output Current VRxD = 0.4 V, normal mode, VLIN = 0 V VRxD = 5 V, Normal Mode, VLIN = V(VBB) 1.5 -5 0 5 mA mA High Level Voltage Drop Leakage Current IINH = 15 mA, INH Active Sleep Mode; VINH = 0 V 0.05 -1 0.35 0 0.75 1 V mA Low Level Input Voltage High Level Input Voltage Pulldown Resistance to Ground (Note 9) -0.3 2.0 150 350 0.8 5.5 650 V V kW Parameter Conditions Min Typ Max Unit
9. Vg is the forward diode voltage. Typically (over the complete temperature) Vg = 1 V.
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NCV7321
Table 4. DC CHARACTERISTICS (VBB = 5 V to 27 V; TJ = -40C to +150C; unless otherwise specified. Typical values are given
at V(VBB) = 12 V and TJ = 25C, unless specified otherwise.)
DC CHARACTERISTICS - I/Os
Symbol PINS TxD Ipd_RxD_Strong Pulldown Current on TxD Pin Corresponding to "Strong Pulldown" Standby Mode after Local Wakeup 1.5 mA Parameter Conditions Min Typ Max Unit
PIN WAKE V_wake_th I_wake_pullup I_wake_leak WAKE Threshold Voltage Pullup Current on Pin WAKE Leakage of Pin WAKE VWAKE = 0 V VWAKE = V(VBB) VBB - 3.3 -30 -5 -15 0 VBB - 1.1 -1 5 V mA mA
DC CHARACTERISTICS - POWER-ON-RESET, BATTERY MONITORING AND THERMAL SHUTDOWN
Symbol POR AND VBB MONITOR PORH_VBB PORL_VBB MONH_VBB MONL_VBB TSD TJ TJ_hyst Junction Temperature Thermal Shutdown Hysteresis Temperature Rising 9 165 18 C C Power-on Reset High Level on VBB Power-on Reset Low Level on VBB Battery Monitoring High Level Battery Monitoring Low Level VBB Rising VBB Falling VBB Rising VBB Falling 3 2 1.7 4.5 4 4.5 V V V V Parameter Conditions Min. Typ. Max. Unit
9. Vg is the forward diode voltage. Typically (over the complete temperature) Vg = 1 V.
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NCV7321
Table 5. AC CHARACTERISTICS VBB = 5 V to 27 V; TJ = -40C to +150C; unless otherwise specified. For the transmitter parameters, the following bus loads are considered: L1 = 1 kW / 1 nF; L2 = 660 W / 6.8 nF; L3 = 500 W / 10 nF
Symbol LIN TRANSMITTER D1 Duty Cycle 1 = tBUS_REC(max) / (2 x TBit) Duty Cycle 2 = tBUS_REC(min) / (2 x TBit) Duty Cycle 3 = tBUS_REC(max) / (2 x TBit) Duty Cycle 4 = tBUS_REC(min) / (2 x TBit) LIN Falling Edge LIN Rising Edge LIN Slope Symmetry THREC(min) = 0.744 x VBB THDOM(min) = 0.581 x VBB TBIT = 50 ms V(VBB) = 7 V to 18 V THREC(max) = 0.422 x VBB THDOM(max) = 0.284 x VBB TBIT = 50 ms V(VBB) = 7.6 V to 18 V THREC(min) = 0.778 x VBB THDOM(min) = 0.616 x VBB TBIT = 96 ms V(VBB) = 7 V to 18 V THREC(max) = 0.389 x VBB THDOM(max) = 0.251 x VBB TBIT = 96 ms V(VBB) = 7.6 V to 18 V Normal Mode; VBB = 12 V Normal Mode; VBB = 12 V Normal Mode; VBB = 12 V -4 0 0.396 0.5 Parameter Conditions Min Typ Max Unit
D2
0.5
0.581
D3
0.417
0.5
D4
0.5
0.590
T_fall T_rise T_sym LIN Receiver Trec_prop_down Trec_prop_up Trec_sym
22.5 22.5 4
ms ms ms
Propagation Delay of Receiver Falling Edge Propagation Delay of Receiver Rising Edge Propagation Delay Symmetry Trec_prop_down - Trec_prop_up
0.1 0.1 -2
6 6 2
ms ms ms
MODE TRANSITIONS AND TIMEOUTS T_LIN_wake Duration of LIN Dominant for Detection of wake-up via LIN bus Duration of Low level on WAKE Pin for local wakeup detection Duration of High Level on EN Pin for Transition to Normal Mode Duration of Low Level on EN Pin for Transition to Sleep Mode TxD Dominant Time-Out Sleep Mode 30 90 150 ms
T_WAKE
Sleep Mode
7
50
ms
T_enable
Version NCV7321D10 Version NCV7321D11 Version NCV7321D10 Version NCV7321D11 Normal Mode, TxD = low, Guarantees Baudrate as Low as 1 kbps
2 2 2 2 15
5 7.5 5 7.5
10 18.5 10 18.5 50
ms ms ms ms ms
T_disable
T_TxD_timeout
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TxD
t BIT 50% t BIT
t LIN
THRec(max) THDom(max) THRec(min) THDom(min) tBUS_dom(max) tBUS_rec(min)
Thresholds of receiving node 1 Thresholds of receiving node 2
t
tBUS_dom(min) tBUS_rec(max)
PC20080606.3
Figure 6. LIN Transmitter Duty Cycle
LIN
100%
60% 40%
60% 40%
0% T_fall T_rise
t
PC20060428.1
Figure 7. LIN Transmitter Rising and Falling Times
LIN
VBB 60% VBB 40% VBB
t RxD
trec_prop_down trec_prop_up 50%
t
Figure 8. LIN Receiver Timing
PC20060428.3
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DEVICE ORDERING INFORMATION
Part Number NCV7321D10G NCV7321D10R2G NCV7321D11G NCV7321D11R2G Description Stand-alone LIN Transceiver Improved Stand-alone LIN Transceiver -40C - 125C SOIC-8 (Pb-Free) Temperature Range Package Type Shipping 96 Tube / Tray 3000 / Tape & Reel 96 Tube / Tray 3000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
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NCV7321
PACKAGE DIMENSIONS
SOIC-8 NB CASE 751-07 ISSUE AJ
-X-
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW STANDARD IS 751-07. DIM A B C D G H J K M N S MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244
A
8 5
B
1
S
4
0.25 (0.010)
M
Y
M
-Y- G
K
C -Z- H D 0.25 (0.010)
M SEATING PLANE
N
X 45 _
0.10 (0.004)
M
J
ZY
S
X
S
SOLDERING FOOTPRINT*
1.52 0.060
7.0 0.275
4.0 0.155
0.6 0.024
1.270 0.050
SCALE 6:1 mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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